The IEEE1394 bus standard has been known as a serial bus standard for transmitting and receiving digital data. According to the IEEE1394 bus standard, there are isochronous transmission as synchronous communication and asynchronous transmission as asynchronous communication. According to the IEEE1394-1995 standard, it has been defined that the isochronous transmission is used for real-time transmission of data such as video data or audio data and the asynchronous transmission is used for transmission of other state data, control data, or the like.
FIG. 1 is a block diagram of an example of a conventional IEEE1394 interface apparatus. The interface apparatus of such an example is constructed as an IC.
An interface apparatus 10 of such an example comprises: a physical layer circuit 11 for connecting to an IEEE1394 bus; a link core circuit 12; an asynchronous transmission FIFO (First In First Out) memory 13; an asynchronous reception FIFO memory 14; a configuration register 15; a host bus interface unit 16; an isochronous transmission FIFO memory 17; an isochronous transmission and reception FIFO memory 18; an encrypting circuit 19; and an application interface unit 20.
The link core circuit 12 comprises: a transmitter 21; a receiver 22; a cycle timer 23; a CRC (Cyclic Redanduncy Check) circuit 24; and a cycle monitoring circuit 25.
The host bus interface unit 16 is used for, when it is implemented into an electronic apparatus, allowing a CPU in the electronic apparatus to be connected as a host computer. The host computer accesses the asynchronous transmission FIFO memory 13, asynchronous reception FIFO memory 14, and configuration register 15 via the host bus interface unit 16 and performs asynchronous communication.
For the purpose of making isochronous communication, the interface apparatus 10 has therein two FIFO memories, that is, the isochronous transmission FIFO memory 17 and isochronous transmission and reception FIFO memory 18 and can perform 2-channel simultaneous transmission and reception and isochronous simultaneous transmission and reception. Owing to the existence of the encrypting circuit 19, an encrypting process can be performed with respect to each of the two FIFO memories 17 and 18.
The application interface unit 20 has a function for enabling an MPEG (Moving Picture Experts Group) 2 transport stream, an IEC (International Electrotechnical Commission) 958 audio stream, or the like to be communicated as an isochronous packet.
In the newly extended IEEE1394 bus standard (1394a), on the other hand, video data and audio data can be transmitted also by the asynchronous asynchronous transmission. It is called an asynchronous stream.
As mentioned above, in the conventional interface apparatus 10, in the asynchronous communication, the CPU in the electronic apparatus functions as a host computer, accesses the asynchronous transmission FIFO memory 13, asynchronous reception FIFO memory 14, and configuration register 15, and performs asynchronous communication.
Therefore, also with respect to the asynchronous stream, if it is intended to likewise performs asynchronous communication by an access of the host computer, when a data size is large or the like, a burden on the host computer becomes very heavy.
In the IEEE1394 interface circuit which handles the asynchronous stream, as mentioned above, it is necessary that packet data fetched from the IEEE1394 bus is once fetched into the buffer memory for reception, the fetched packet data is transferred to another memory, thereafter, packet-decomposed, and transferred to an internal signal processing system, and data from the internal signal processing system is fetched into a predetermined memory, packetized, thereafter, transferred to the buffer memory for transmission, and sent from the buffer memory for transmission to the IEEE1394 bus.
In this case, according to the IEEE1394 bus standard, since the data is transmitted on a unit basis of a packet consisting of a data amount of, for example, 512 to 2048 bytes, for instance, in case of transmitting data of a still image as an asynchronous stream, data of a plurality of packets is ordinarily transmitted.
According to the IEEE1394 bus standard, in the interface apparatus 10, although it is necessary to transmit and receive the data on a quadlet (4 bytes) unit basis, a method of designating a range of the packet in case of transferring the data from the memory to the memory as mentioned above does not exist hitherto. Therefore, a method which is effective in the data transfer between the memories is demanded.
It is an object of the invention to provide data transmitting method and apparatus and communication interface method and apparatus which can solve the problems as mentioned above.